TPD7100F 2006-10-31 1 toshiba intelligent power device silicon monolithic power mos integrated circuit TPD7100F 2 channel high-side n-ch power mosfet gate driver the TPD7100F is a 2 channel high-side n-ch power mosfet gate driver. this ic contains a power mosfet driver and power mosfet protective and diagnostic functions, allowing easy configuration of a high-side switch for large-current applications. features z the large-current charge pump allows for fast switching z power mosfet protective and diagnostic functions are built-in. protective functions: overvoltage (internal device protection), overcurrent protection, v dd voltage drop detection * overvoltage is internally limited. no detection or shutdown functions are included. diagnostic functions: overcurrent z the level of overcurrent detection can set by external resistor. z package: ssop-24 (300 mil) with embossed-tape packing due to its mos structure, this product is sensitive to static electricity. handle with care. pin assignment marking weight: 0.29g(typ.) TPD7100F a dot indicates lead (pb)-free package or lead (pb)-free finish. part no. (or abbreviation code) lot no.
TPD7100F 2006-10-31 2 block diagram
TPD7100F 2006-10-31 3 pin description pin no. symbol pin description 1 cp2 ? negative side connecting pin for the charge pump?s second capacitor 2 cp 1 ? negative side connecting pin for the charge pump?s first capacitor 3 cp1 + positive side connecting pin for the charge pump?s first capacitor 4 cp2 + positive side connecting pin for the charge pump?s second capacitor 5 cpv + positive side connecting pin for the charge pump?s third capacitor: although about three times the v dd voltage is generated, it is limited to about 28 v by a voltage clamping circuit. 6 n.c. ? 7 v gs1 external power mosfet gate drive pin for ch1: this pin controls the external power mosfet. also, when overcurrent flows in the external power mosfet, it shuts down the gate and is latched. it is unlatched by a low on-input. 8 vsense1 external power mosfet monitor pin for ch1: overcurrent is detected by comparing the difference between this and the v dd2 pin with the reference voltage. 9 v gs2 external power mosfet gate drive pin for ch2: this pin controls the external power mosfet. also, when overcurrent flows in the external power mosfet, it shuts down the gate and is latched. it is unlatched by a low on input. 10 vsense2 external power mosfet monitor pin for ch2: overcurrent is detected by comparing the difference between this and the v dd2 pin with the reference voltage. 11 gnd ground pin : shared internally with pin 12. 12 gnd shared internally with pin 11. 13 in2 input pin for ch2 (active high) : this pin has a pull-down resistor (100 k ? typ.), so that even when it is open-circuited, output will not turn on inadvertently. 14 in1 input pin for ch1 (active high) : this pin has a pull-down resistor (100 k ? typ.), so that even when it is open-circuited, output will not turn on inadvertently. 15 diag2-1 diagnostic output pin for ch2 (n-ch open-drain): when the overcurrent condition is detected, its output goes low. also, when overcurrent is detected, it remains latched until the next rising edge of input. 16 diag2-2 diagnostic output pin for ch2 (n-ch open-drain): by comparing the voltage between v dd2 and vsense2 pins with the set overcurrent level, it outputs external power mosfet on / off state. 17 diag1-1 diagnostic output pin for ch1 (n-ch open-drain): when overcurrent condition is detected, its output goes low; in this case, it also remains latched until the next rising edge of input. 18 diag1-2 diagnostic output pin for ch1 (n-ch open-drain): by comparing the voltage between v dd2 and vsense1 pins with the set overcurrent level, it outputs external power mosfet on / off state. 19 enb chip inhibit pin (active low): by driving this pin hi gh, all outputs can be turned off regardless of input signals. this pin has a pull-up resistor (100 k ? typ.).
TPD7100F 2006-10-31 4 pin no. symbol pin description 20 rlsref2 overcurrent detection level setup pin for ch2: the voltage determined by the constant current set by the resistor connected to the rref pin and the resistance of an external resistor connected to the risref2 pin is referenced to detect overcurrent. 21 rlsref1 overcurrent detection level setup pin for ch1: the voltage determined by the constant current set by the resistor connected to the rref pin and the resistance of an external resistor connected to the risref1 pin is referenced to detect overcurrent. 22 rref resistor connection pin: this resistor determines the constant current used for the overcurrent detection circuit. connect 62k ? (recommended) between this pin and gnd. 23 v dd2 external power mosfet drain voltage detection pin. 24 v dd1 power supply pin: the internal device is protected when overvoltage is applied. absolute maximum ratings (ta = 25c) characteristics symbol rating unit power supply voltage v dd 30 v input voltage v in ? 0.5 ~ 6 v diagnosis output current idiag 2 ma power dissipation p d 0.8 w operating temperature t opr ? 40 ~ 110 c storage temperature t stg ? 55 ~ 150 c note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, et c.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon review ing the toshiba semiconductor reliability handbook (?handling precautions?/derating concept and methods) and in dividual reliability data (i.e. reliability test report and estimated failure rate, etc).
TPD7100F 2006-10-31 5 electrical characteristics (unless otherwise specified, v dd = 8~18v, t j = ? 40 to 110c) characteristics rating pin no. test condition min typ. max unit operating supply voltage v dd v dd ? 8 ? 18 v supply current i dd v dd v dd = 12 v, v in = 0 v, cp = 0.01 f ? ? 10 ma v in (1) v dd = 12 v, v gs = ?h? 3.5 ? ? input voltage v in (2) in1, in2 v dd = 12 v, v gs = ?l? ? ? 1.5 v i in (1) in1, in2 v dd = 12 v, v in = 5 v ? ? 200 i in (2) v dd = 12 v, v in = 0 v ? 1 ? 1 enb i (1) v dd = 12 v, enb v = 5 v ? 45 ? ? input current enb i (2) enb v dd = 12 v, enb v = 0 v ? 250 ? ? a output voltage v oh v dd = 12 v, v in = 5 v ? vsense + 15* vsense + 19* v v ol v dd = 12 v, v in = 0 v ? ? 0.4 i oh v dd = 12 v, v in = 5 v, cp = 0.01 f ? 0.1 ? output current i ol v gs1 v gs2 v dd = 12 v, v in = 0 v, cp = 0.01 f ? 0.1 ? a overcurrent detection resistance setup range rlsref rlsref ? 10 20 40 k ? constant current source setup pin voltage vrref rref rref = 62 k ? 1.17 1.30 1.43 v v ds(on)(1) rref = 62 k ? rlsref = 10 k ? 0.16 0.20 0.24 v ds(on)(2) rref = 62 k ? rlsref = 20 k ? 0.32 0.40 0.48 overcurrent detection voltage v ds(on)(3) v dd2 vsense1 vsense2 rref = 62 k ? rlsref = 40 k ? 0.64 0.80 0.96 v diagnostic output current i dh v dd = 12 v, vdiag = 5 v ? ? 10 a diagnostic output voltage v dl diag1 diag2 v dd = 12 v, i dl = 1 ma ? ? 0.6 v power supply drop detection voltage vdduv1 ? ? 6.3 6.7 7.3 power supply drop detection reset voltage vdduv1 + ? 6.6 7.2 7.8 undervoltage protection vdduv2 v dd ? ? ? 4.5 v t on ? 2 5 switching time t off v gs1 v gs2 v dd = 12v, c = 3000 pf ? 2 5 s *: vsense denotes the vsense pin voltage. the following equation is used to calculate overcurrent detection resistance (risref): rlsref = rref r ds (on) i d / vrref = rref v ds (on) / vrref where r ds (on) : on-resistance of external power mosfet i d : drain current of external power mosfet v ds (on) : on-voltage of external power mosfet rref : external resistor connected to rref pin (used to set constant current) vrref : rref pin voltage
TPD7100F 2006-10-31 6 truth table in enb v gs diag * -1 diag * -2 state l h l h h h h l h h l l l h h h l h h (note 1) l normal l l l h h h l h h (note 1) l overvoltage l l l l (note 1 / note 2) h h l l l (note 1) h overcurrent l l l h h h l h h h supply voltage drop l l l h h h l l h h undervoltage protection l l l h l h l h h l power mosfet shorted note 1: since overcurrent is detected by checking the drain-to-source voltage of the power mosfet, there is a possibility of erroneous detecti on of overcurrent for a while after the input is driven high but before the power mosfet is turned on, during which interval the drain-to-source voltage is high. to prevent this erroneous detection, diag detection is disabled for 15 s (typ.) by a mask circuit. this masking time depends on the constant current determined by the internal capacitor and rref. (the masking time is 15 when rref = 62 k ? .) note 2: after overcurrent is detected, diag remains latched until the next rising edge of input. timing chart
TPD7100F 2006-10-31 7 application circuit 1 monitoring power mosfet drain-source voltage application circuit 2 monitoring voltage between shunt resistors (for detecting overcurrent with high accuracy) moisture-proof packing after the pack is opened, use the devices in a 30c, 60% rh environment, and within 48 hours. embossed-tape packing cannot be baked. devices so packed must be used within their allowable time limits after unpacking, as specified on the packing. standard tape packing quantity: 2000 devices / reel (el1)
TPD7100F 2006-10-31 8 package dimensions ssop24-p-300-1.00c unit : mm weight: 0.29g (typ.)
TPD7100F 2006-10-31 9 ? the information contained herein is subject to change without notice. ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handling guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc.. ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk. ? the products described in this document are subject to the foreign exchange and foreign trade laws. ? toshiba products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law and regulations. 030619eba restrictions on product use
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